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Parag K. Lala


Parag K. Lala is a Professor of Electrical Engineering. He received an M.Sc.(Eng.) degree from King’s College, London, a Ph.D. from The City University of London, and a D.Sc.(Eng.) degree from the University of London. His current research interests are On-line testable logic synthesis, Biologically-inspired digital system design, Quantum Computing/Cryptography and Hardware-based DNA sequence matching. He guided 40 graduate students in their master’s and doctoral thesis work, and is the author/co-author of more than 145 papers.

He is also the author of seven books: Fault-Tolerant & Fault-Testable Hardware Design (Prentice-Hall), Digital System Design using PLDs (Prentice-Hall), Practical Digital Logic Design and Testing (Prentice-Hall), Digital Circuit Testing and Testability (Academic Press), Self-Checking and Fault-Tolerant Digital Design (Morgan-Kaufmann),  Principles of Modern Digital System Design ( John Wiley and Sons Inc.), and Logic Circuit Testing       (Morgan-Claypool)

He was named a Fellow of the IEEE in 2001 for contributions to the development of self-checking logic and associated checker design. He is also a Fellow of the IET (previously Institute of Electrical Engineers) in the United Kingdom.


D.Sc.(Eng.)                Digital Hardware Design and Test,  University of London, England, 1998

Ph.D.                         Electronics, The City University of London, England, 1977

M.Sc.(Eng.).               Electronics, King’s College, London, England, 1972


Experience (Last 15 years)

2006 – Present             Professor, Electrical Engineering, Texas A&M University-Texarkana

1999 – 2005                Thomas Mullins Chair Professor, Dept. Computer Science and Computer Engineering, University of Arkansas, Fayetteville


Academic Awards

Outstanding Educator Award, IEEE Central North Carolina Section, 1995

IEEE, Fellow, 2001

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